Design Description

This design inverts the input signal, Vi, and applies a signal gain of –2V/V. The input signal typically comes from a low-impedance source because the input impedance of this circuit is determined by the input resistor, R3. The common-mode voltage of an inverting amplifier is equal to the voltage connected to the non-inverting node, which is ground in this design. D1 indicates the power, all connection can be done using CN1 header connector, Capacitors, Resistors, LEDs are SMD components size 0805. Op-Amp TLV170 from Texas Instruments.

D1=Power LED, CN1= 6 Pin male header connector

ViMIN=-7V, ViNMAX=7V, VoMIN=–14V, VoMAX=14V, F=3KHZ, V+=15V, V-=-15V

Design Notes

  1. Use the op amp in a linear operating region. Linear output swing is usually specified under the AOL test conditions. The common-mode voltage in this circuit does not vary with input voltage.
  1. The input impedance is determined by the input resistor. Make sure this value is large when compared to the source’s output impedance.
  1. Using high value resistors can degrade the phase margin of the circuit and introduce additional noise in the circuit.
  1. Avoid placing capacitive loads directly on the output of the amplifier to minimize stability issues.
  2. Small-signal bandwidth is determined by the noise gain (or non-inverting gain) and op amp gainbandwidth product (GBP). Additional filtering can be accomplished by adding a capacitor in parallel to R1. Adding a capacitor in parallel with R1 will also improve stability of the circuit if high value resistors are used.
  1. Large signal performance may be limited by slew rate. Therefore, check the maximum output swing versus frequency plot in the data sheet to minimize slew-induced distortion.
  1. For more information on op amp linear operating region, stability, slew-induced distortion, capacitive load drive, driving ADCs, and bandwidth please see the Design References section.




Application Courtesy of Texas Instruments